Archives

The AMC526 provides dual-channel ADC with sample rates up to 2.6 GSPS, making it suitable for signal capture/analysis applications such as COMINT/SIGINT, radar, research and instrumentation. The on-board Virtex-7 690T is suitable for local signal processing and data reduction prior to transfer out via the backplane using PCIe, SRIO or Ethernet.

The AMC ports 12-15 and 17-20 are optionally routed to the FPGA from the AMC connector, providing the user with flexibility to support custom high-bandwidth interconnects between compatible FPGA modules (depending on backplane capabilities). The FPGA is supported by FLASH memory for boot image storage, four banks of QDR-II+ for fast data buffering and a further bank of DDR3 for local data.

TCLK A-D are routed to the FPGA via an on-board clock and jitter cleaner while FCLK is routed directly. The module includes a very flexible clocking sub-system, supporting internal or external (backplane or front panel) clock source with internal PLL/jitter cleaner.

The AMC526 is available in both air-cooled (MTCA.0 and MTCA.1) and rugged conduction cooled(MTCA.2 or MTCA.3) versions.

The AMC521 utilizes eight dual channel ADS42JB69 ADC converters at 250 MSPS with 16-bit resolution for 16 high sampling rate channels. In addition the module has eight 16-bit Successive Approximation Register (SAR) based on TI ADS8568 ADC at a lower sampling rate for measurements to 650 KSPS. There are also 24 LVDS I/O which can be used for Clock In/Out, Trig In/Out or GPIO.

The AMC521 has an M-LVDS Cross Bar Switch (CBS) for clock distribution which allows clocking from front panel, backplane, or on-board VCXO. The clock outputs to the backplane for distribution to other modules. The AMC521 has a Virtex-7 FPGA with option of 415T or 690T in FFG1158 package.

The AMC ports 4-7 and 8-11 are routed to the FPGA for PCIe, XAUI, SRIO, or other SerDes protocols. AMC ports 0, 1 and 2, 3 are also routed to the FPGA for base channel and storage point-to-point connectivity.

Based on Altera’s Stratix II GX FPGA, BittWare’s SF/GX-AMC (SF/GXAM) is a full-size, single wide AdvancedMC that can be attached to AdvancedTCA (Advanced Telecom Compute Architecture) carriers or other cards equipped with AMC bays, and used in MicroTCA systems. The SF/GXAM features four small form-factor pluggable-plus (SFP/SFP+) compact optical transceiver connectors, a high-density Altera Stratix II GX FPGA, BittWare’s ATLANTiS FrameWork, a front panel I/O interface, a control plane interface via BittWare’s FINe Host/Control Bridge, an IPMI system management interface, and a configurable 11x SerDes AMC interface supporting a variety of protocols. It also provides 10/100 Ethernet, Gigabit Ethernet, two banks of DDR2 SDRAM, and Flash memory for booting the FPGA and FINe.