AdvancedTCA® Overview

atca2The Advanced Telecom Computing Architecture (AdvancedTCA®) atca37458specifications, denoted PICMG 3.X, are a series of PICMG specifications, designed to provide an open, multi-vendor architecture targeted to requirements for the next generation of carrier grade communications equipment. This series of specifications incorporates the latest trends in high speed interconnect technologies, next generation processors and improved reliability, manageability and serviceability.

AdvancedTCA, also known as ATCA, is the first open architecture that provides an extremely sophisticated and robust system management architecture that enables High Availability systems that keep running in the event of individual component or sub-system failure. This also enables “on-the-fly” software upgrades while the system is operating.

The original AdvancedTCA specification was released in January of 2003 and has been adopted by many of the top telecommunication equipment providers. It has expanded its reach into non-carrier grade environments where high processor and I/O density coupled with high system bandwidth are required.

AdvancedTCA is the most widely used open standard for global telecommunications infrastructure and is becoming so for a variety of critical military applications. AdvancedTCA is also employed in large-scale physics experiments and ruggedized applications in the military market.

Companies participating in the AdvancedTCA effort have brought a wide range of knowledge of the industry. They include telecommunications equipment manufacturers, board and system level vendors, computer OEMs, software companies and chassis, connector and power supply vendors.

The specifications provide enough information to allow board, backplane, and chassis vendors to independently develop products that will be interoperable when integrated together. Details include board dimensions, equipment practice, connectors, power distribution and a robust system management architecture that can be used independent of the switch fabric link technology. Interoperability of system components from different manufacturers is tested regularly through an on-going series of PICMG-sponsored Interoperability Workshops.

The AdvancedTCA community has recently completed and released of a fairly major enhancement to the core ATCA standard. This new specification is known as “PICMG 3.7” or “ATCA Extensions.” It expands the packaging definitions to include dual sided shelves, where ATCA boards can plug into either the front of the back of a double-deep rack and interconnect through the backplane. In addition to this, the Extensions specification also allows for something called Extended Transition Module (ETM) that is essentially a front board-sized circuit board that connects to a front board via Zone 3, much like a standard Rear Transition Module. There are many variations of interconnects allowed, but Figure 1 below gives a general idea of the concept.

37picmg

Importantly, PICMG 3.7 provides a much more detailed definition of, and support for, double wide modules than the original specification. These can support multiple processors, bigger heatsinks, cheaper full height memory modules, and multiple disk drives on a single assembly if desired. PICMG 3.7 also defines requirements for typical data center environments in addition to the telco central office. Double wide modules can support up to 800W of power dissipation if the shelf is built for that. AC as well as traditional -48VDC power environments are also supported.

AdvancedTCA now supports IPv6 Addressing Protocols

Key Benefits and Features

  • AdvancedTCA provides the high availability necessary for central office applications which often require European Telecommunication Standard Institute (ETSI) and Network Equipment Building System (NEBS) compliance.
  • Each chassis can accommodate up to 16 slots (23” width) or 14 slots (19” width) to offer scalable capacity up to 10 terabits per second.
  • Includes hot-swappable, managed and redundant fan units to cool blades which can dissipate 400 Watts per slot.
  • Redundant -48 VDC power infrastructure compatible with global telecom standards.
  • The mid plane design allows usage of Rear Transition Modules (RTM) for I/O connectivity to the companion front board blade. This is popular in central office telecom applications where it is desirable to be able to change computer modules without disturbing wiring.
  • Blades are interconnected redundantly in star or mesh fabric topologies via a base interface and via an optional fabric interface.
  • The base interface and higher speed fabric interface provide connectivity across the slots allowing separation of control plane processing from higher bandwidth user plane data.
  • Supports multiple switching fabric interfaces as defined in standards PICMG 3.1 (Ethernet and Fiber Channel) through PICMG 3.5 (Serial RapidIO).
  • High levels of modularity and configurability can be achieved through the use of Advanced Mezzanine Cards as defined in the PICMG AMC family of standards.
  • Shelf management monitors and controls blades and other Field Replaceable Units (FRUs). It also controls power, cooling, and interconnection across the system enabling enhanced functionality
  • The shelf management system can retrieve inventory information and sensor readings as well as receive event reports and failure notification from any FRU.
  • The shelf management also performs basic recovery operations such as power cycle and reset of any managed entities.

Family of Specifications

AdvancedTCA® Base Specification
PICMG# Name Current Revision Date Description
PICMG 3.0

AdvancedTCA® Base Specification

Rev 3.0 2008-03-24

The PICMG® 3.0 specification defines open architecture modular computing components that can be quickly integrated to deploy high performance services solutions. The specification is focused on the definition of an architecture that can: 

  • Enable reduced development time and costs
  • Support reduced total cost of ownership
  • Apply to edge, core, transport, and data center
  • Apply to wireless, wireline, and optical network elements
  • Support a rich mix of processors, digital signal processors (DSPs), packet processors, storage, and input/output (I/O)
  • Integrate with multiple network elements
  • Provide multi-protocol support for interfaces up to 40 Gbps
  • Offer high levels of modularity and configurability
  • Improve volumetric efficiency
  • Improve power distribution and management
  • Offer an advanced software infrastructure providing operating systems (OSs),
  • application programming interface (API), and operation, administration, management,
  • and provisioning (OAM&P)
  • Offer world-class element cost and operational expense
  • Provide high levels of service availability (99.999% and greater) through the integration of features for resiliency, redundancy, serviceability and manageability
  • Support appropriate scalability of System performance and capacity 

The architecture is tailored to meet the needs of the rapidly changing communications network infrastructure. The performance, environment and surrounding regulatory requirements of application types, sometimes referred to as “Central Office,” “carrier-grade” or “service provider” serve as a framework for the definition of the architecture. Industry specifications that are representative of these environments are directly referenced or used as guidelines for the structure of the specification. 

Given the pace at which technologies and services are changing, this specification places high priority on cost effectiveness versus attempting to support a variety of potential future technologies at the expense of cost and complexity. While the specification is founded on the

requirements of the communications infrastructure, it is extensible to a variety of applications and environments where highly available, highly scalable, cost effective, open architecture modular solutions are required. 

Objectives

The objective of this document is to present base requirements, and, in some cases, suggest implementations for the PICMG® 3.0 Specification. Included is detailed information of the following elements that must be considered during development: 

  • Mechanicals  
  • Hardware platform management 
  • Power distribution 
  • Power Connector zone (for Dual –48 VDC power to each Slot) 
  • Rear I/O access zone 
  • Data transport Connector zone (for management and switching fabric interconnect) 
  • Shelf thermal dissipation 
  • Regulatory guidelines

PICMG 3.0 Specification now supports IPv6 Addressing Protocols

PICMG has just released Engineering Change Notices (ECNs) for the PICMG 3.0 AdvancedTCA Base Specification and the PICMG 3.7 AdvancedTCA Base Extensions Specification.

AdvancedTCA was originally specified to use 32 bit IP addresses according to the IPv4 protocol. IPv4 supports 4 billion distinct IP addresses and in the emerging world of Internet of Everything and billions of interconnected devices, this is not enough. IPv6 uses 128 bit addresses, so more than 3.4 times ten-to-the-thirty-eighth power devices can be directly addressed.

Engineering Change Notices are a method PICMG uses to make permanent, binding changes to a specification without releasing a new revision. Once released, they become part of an existing specification. The IPv6 feature is completely optional and does not affect backwards compatibility in any way. All existing compliant ATCA systems will remain so. New systems can choose to implement this feature or not.
Click to download.
ECN001_PICMG_ATCA_3_0_R3_0-RELEASED-2015-04-20b

Ethernet/Fibre Channel for AdvancedTCA
PICMG# Name Current Revision Date Description
PICMG 3.1

Ethernet/Fibre Channel for AdvancedTCA

Rev 2.0 2012-08-03

The PICMG® 3.1 specification is a member of the PICMG 3 AdvancedTCA® series of specifications. The base specification in the family, PICMG 3.0, is required to understand this specification. The PICMG 3.0 base specification implements a plug-in card & chassis architecture where the plug-in cards all have point-to-point differential pair serial-data links to communicate with each other. The base design is sufficiently generic that it can accommodate many different link-level standards. PICMG 3.1 establishes the usage of Ethernet (IEEE 802.3) and Fibre Channel (NCITS T11) communication within the AdvancedTCA® chassis. 

Ethernet is a highly successful LAN (Local Area Network) standard with support from a wide array of silicon, board, and software vendors. Originally developed by a consortium consisting of Digital Equipment Corporation, Intel, and Xerox (“DIX”) it was eventually standardized in 1983. Higher speeds of operation and other new capabilities have been defined and incorporated into the standard over the years. IEEE 802.3 and its amendments are approved as national standards by ANSI, and international standards by ISO, although these approvals will lag from IEEE Standards Association approval. The international standards are published as ISO/IEC 8802-3.” 

Fibre Channel has become a very popular standard for the connection of disk media storage systems with processors to form SANs (Storage Area Networks). It has been incorporated into PICMG 3.1 to allow the development of chassis units with mass storage in addition to processing and switching. PICMG 3.1 supports a Fibre Channel Port as FC-PI. The default for a FC-PI Port is 1 Gbps, however if both ends have Auto-Negotiation implemented, a data rate of 2 Gbps can be achieved. In general, the use of Fibre Channel is expected to be used in parallel with Ethernet, although PICMG 3.1 does not preclude the use of Fibre Channel only. 4 PICMG 3.1 supports 10 Gigabit Ethernet via AdvancedTCA® Channels using IEEE 10GBASE-KX4, IEEE 10GBASE-KR, and XAUI signaling and supports 40 Gigabit Ethernet using IEEE 40GBASE-KR4 signaling.

Objectives

The specification in this document is derived from and is dependent upon, the PICMG 3.0 base specification. It is not intended to stand-alone or to be used separately from the base specification.

PICMG 3.1 builds upon the PICMG 3.0 base specification, the IEEE 802.3-2008 and IEEE 802.3ba-2010 specifications as well as the Fibre Channel FC-PI specifications, to meet the following objectives:

  • Define the signals to be used over the data link Channels provided by PICMG 3.0 based on Ethernet/Fibre Channel-compatible devices.
  • Support over each PICMG 3.0 Channel the option of

One Port of Gigabit or 10-Gigabit Ethernet

Two Ports (Link-aggregated optional) of Gigabit or 10-Gigabit Ethernet2

Four Ports (Link-aggregated optional) of Gigabit or 10-Gigabit Ethernet

Optionally one or two Ports of Fibre Channel

One Channel of 10-Gigabit or 40-Gigabit Ethernet (utilizes all four ports)

  • Establish the rules for compatibility between PICMG 3.1 devices.
  • Define design rules such that devices compatible with some standard other than PICMG 3.1 in the PICMG 3.x family can be safely inserted in the same system, even if they do not function.  
InfiniBand for AdvancedTCA
PICMG# Name Current Revision Date Description
PICMG 3.2

InfiniBand for AdvancedTCA

Rev 1.0 2003-01-22

Defines how InfiniBand transport is mapped onto PICMG 3.0

Starfabric/Advanced Switching for AdvancedTCA
PICMG# Name Current Revision Date Description
PICMG 3.3

Starfabric/Advanced Switching for AdvancedTCA

Rev 1.0 2003-05-21

Defines how StarFabric transport is mapped onto PICMG 3.0

PCI Express® for AdvancedTCA
PICMG# Name Current Revision Date Description
PICMG 3.4

PCI Express® for AdvancedTCA

Rev 1.0 2003-05-21

The PICMG 3.4 specification is a member of the PICMG 3.0 AdvancedTCA series of specifications. The PICMG 3.0 base specification defines a Board and Shelf architecture sharing a common Backplane. PICMG 3.4 Boards are intended for use with PICMG 3.0 backplanes, sub-racks and shelves. The specification is sufficiently generic that it can accommodate many different point-to-point differential pair serial link standards. PICMG 3.4 defines the use of both PCI Express Base and Advanced Switching based on PCI Express within an AdvancedTCA platform.

The PCI Express Base specification was ratified by the PCI Special Interest Group in July 2002.

The Advanced Switching specification, which defines functional extensions to the PCI Express Base PHY and link layers, is currently under development. Because PCI Express and Advanced Switching are electrically compatible, PICMG 3.4 requirements apply to both technologies. The Advanced Switching Specification is targeted at enabling additional communications capabilities, including a globally flat addressable fabric used to enable star and mesh topologies, message passing, multicast and broadcast capabilities, as well as congestion management and transport reliability. 

Objectives 

The content of this document is derived from and is dependent upon the PICMG 3.0 base specification. It is not intended as a standalone document or to be used separately from the base specification.

PICMG 3.4 builds upon the PICMG 3.0 specification to meet the following objectives:

  •  Define the PCI Express signals to be used over the Fabric Interface defined in the PICMG 3.0 base specification.
  •  Provide guidelines for the use of x1, x2, and x4 PCI Express links through Link Width Negotiation.
  • Support over each PICMG 3.0 Channel for up to 10Gbps PCI Express links.
  • Establish the System Management criteria for ensuring compatibility between PICMG 3.4 boards.
  •  Define design rules such that devices compatible with other PICMG 3.0 standards can be safely inserted in the same system, even if they do not interoperate.
  • Provide example topologies and example implementations for Board and Backplane developers. 
Serial RapidIO for AdvancedTCA
PICMG# Name Current Revision Date Description
PICMG 3.5

Serial RapidIO for AdvancedTCA

Rev 1.0 2005-09-21

PICMG 3.5 is a member of the AdvancedTCA series of specifications. The base specification for the series, PICMG 3.0 implements a plug-in board and chassis architecture where the plug-in boards all have point-to-point differential pair serial-data links to communicate with each other. The specification is sufficiently generic that it can accommodate many different point-to-point serial link standards. PICMG 3.5 defines the use of serial RapidIO™ within an AdvancedTCA platform.

Objectives 

The content of this document is derived from, and is dependent upon the PICMG 3.0 base specification. It is not intended as a standalone document and/or to be used separately from the base specification. PICMG 3.5 builds upon the PICMG 3.0 specification to meet the following objectives:

  • Define the signals to be used over the Fabric Interface, as specified in PICMG 3.0 base specification.
  • Define the options for the use of 1x and 4x serial RapidIO links over the Fabric Interface.
  • Provide recommendations and guidelines for utilization of RapidIO features that increase performance and interoperability.
AdvancedTCA® Extensions
PICMG# Name Current Revision Date Description
PICMG 3.7

AdvancedTCA® Extensions

Rev. 1.0 2015-01-16

Develops extensions to AdvancedTCA for use in enterprise applications.

PICMG 3.7 Introduction

PICMG 3.7 Specification now supports IPv6 Addressing Protocols

AdvancedTCA was originally specified to use 32 bit IP addresses according to the IPv4 protocol. IPv4 supports 4 billion distinct IP addresses and in the emerging world of Internet of Everything and billions of interconnected devices, this is not enough. IPv6 uses 128 bit addresses, so more than 3.4 times ten-to-the-thirty-eighth power devices can be directly addressed.

Engineering Change Notices are a method PICMG uses to make permanent, binding changes to a specification without releasing a new revision. Once released, they become part of an existing specification. The IPv6 feature is completely optional and does not affect backwards compatibility in any way. All existing compliant ATCA systems will remain so. New systems can choose to implement this feature or not.

ECN001 for PICMG 3.7 Revision 1.0 may be downloaded here.

ECN001 for PICMG 3.7 Revision 1.0

AdvancedTCA Rear Transition Module
PICMG# Name Current Revision Date Description
PICMG 3.8

AdvancedTCA Rear Transition Module

Rev 1.0 2011-09-05

Defines a set of connectors for data and management on the RTM described in PICMG 3.0 R3.0. Primarily used for instrumentation and High Energy Physics applications

Intelligent Rear Transition Module
PICMG# Name Current Revision Date Description
IRTM.0

Intelligent Rear Transition Module

Rev 1.1 2011-1-1

The objective of this specification is to define hardware platform management aspects of Intelligent (MMC-based) Rear Transition Modules (IRTMs), covering Point-To-Point (P2P) and Clock E-Keying and related hardware platform management topics. 

This specification defines E-Keying mechanisms without defining specific pinouts or connector descriptions as these may vary from one IRTM to another. Instead, the IRTM implementation specific documentation must define the required pinout mappings to “Ports” as defined in this specification. 

IRTMs provide electrical and mechanical support for hot swapping. Actual complete implementations for hotswapping of IRTMs require additional levels of support from the Front Board, operating system, and other software. 

Physics Design Guide for Clocks, Gates, and Triggers
PICMG# Name Current Revision Date Description
PDG.0

Physics Design Guide for Clocks, Gates, and Triggers

Rev 1.0 2013-04-23

Provides guidance for the construction of high speed, very low latency data acquisition

System Fabric Plane
PICMG# Name Current Revision Date Description
PICMG SFP.0

System Fabric Plane

Revision 1.0 2005-3-24

A System Fabric is a Layer-2 network LAN creating:

–       a LAN between blades in a backplane

–       a LAN that spans multiple backplanes

System Fabric Plane Internal TDM
PICMG# Name Current Revision Date Description
PICMG SFP.1

System Fabric Plane Internal TDM

Revision 1.0 2005-03-24

Implements multiplexed Voice Over Packet protocol

Target Applications

  • Telecom infrastructure equipment including many of the elements in the Evolved Packet Core(EPC) and IP Multimedia Subsystem(IMS).
  • High-end network security platforms which secure enterprise data centers (banks, insurance companies, etc).
  • Large-scale physics experiments.
  • Military radar, shipboard, and ground mobile

System Requirements

An AdvancedTCA system typically consists of a shelf (backplane and card cage), one or more fabric witch cards, a variable number of processors boards (blades), system management infrastructure including one or more Shelf Management cards, and a source of -48VDC, usually dual and redundant. 

The design flexibility offered by the Data Transport Interfaces, particularly the Fabric Interface, requires some guidelines to ensure proper inter-operability between compatible Boards. 

The AdvancedTCA™ Electronic Keying mechanism will confirm compatible connections exist prior to interface drivers being enabled. This ensures incompatible Boards do not damage one another if installed into a Shelf together; however, inter-operability of compatible Boards can only be obtained when they are installed correctly. In general, it is best to install Boards starting with the lowest numbered Logical Slots