The CompactPCI® family of specifications define a low cost, 
modular, and scalable approach to building systems suitable for an extremely wide range of industrial, commercial, aerospace, military, instrumentation, data acquisition, communications, telephony, machine control, and man machine interface applications.
CompactPCI, first introduced in 1999, has continued to evolve new applications – including the two main computers on the Mars Rover, Curiosity.
CompactPCI’s success is due in no small part to its adoption of the parallel PCI bus as the main data bus. PCI was the first universal, processor-independent computer bus that was adopted by all major microprocessor manufacturers. Hundreds of processors chipsets and thousands of peripheral chips utilize PCI. By leveraging low cost silicon and software developed for PCI, CompactPCI has become the world’s most popular modular open computer architecture designed for embedded applications.
The PICMG 2.16 version of CompactPCI defined the industry’s first switched fabric Ethernet backplane architecture that allowed more than a dozen processor boards to be interconnected as a local high speed LAN in a single chassis.
Key Benefits and Features
- 3U and 6U Eurocard form factors are defined utilizing the popular IEEE 1101.1 and IEEE 1101.10 mechanical standards providing implementation flexibility and widely available off-the-shelf parts.
- Supports Hot Swap of boards while a system is operating. This enables mission critical systems.
- Convection cooled and conduction cooled modules are defined.
- Thousands of compliant products are commercially available, including processors, I/O cards, backplanes, card cages, system enclosures, and complete pre-packaged systems.
- Wide O/S support
- Scalable from a single board to large systems
- CompactPCI® Express version optimized for instrumentation and data acquisition applications
- CompactPCI® Serial migrates parallel PCI bus to serial PCI Express, SATA, Ethernet, and USB, offering higher performance while maintaining backwards compatibility.
Family of Specifications
CompactPCI Express
| PICMG# | Name | Current Revision | Date | Description |
| PICMG EXP.0 | CompactPCI Express |
Rev 2.0 | 2013-03-22 | Designed for instrumentation and data acquisition applications. Supports PCI Express Gen 1,2, and 3 signaling. |
CompactPCI Serial
| PICMG# | Name | Current Revision | Date | Description |
| PICMG CPCI-S | CompactPCI Serial |
Rev 1.0 | 2011-03-02 | Updates CompactPCI to include modern high speed serial interconnects maintaining standard CompactPCI mechanical specifications and backwards compatibility with older I/O cards. |
CompactPCI Plus IO
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.30 | CompactPCI Plus IO |
Rev 1.0 | 2009-11-11 | Adds high speed serial buses to backplane, including PCI Express, USB, SATA, and Ethernet. Compatible with CompactPCI and CompactPCI Serial |
CompactPCI Serial Mesh Interconnect
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.20 | Rev 1.0 | 2002-10-21 | Overlays high speed mesh fabric onto backplane for ATM, Frame Relay, and other telecom protocol processing. |
CompactPCI Serial Rapid I/O Interconnect
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.18 | CompactPCI Serial Rapid I/O Interconnect |
Rev 1.0 | 2004-06-18 | Overlays SRIO fabric onto CompactPCI backplane |
CompactPCI Starfabric Interconnect
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.17 | CompactPCI Starfabric Interconnect |
Rev 1.0 | 2002-05-20 | Overlays Starfabric switching architecture on CompactPCI backplane |
CompactPCI Packet Switching Interconnect
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.16 | Rev 1.0 | 2001-09-05 | Overlays packet switched Ethernet architecture on backplane to create an embedded LAN with multiple processor boards |
PCI Telecom Mezzanine for CompactPCI
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.15 | Rev 1.0 | 2001-04-11 | Defines PMC module for interface to popular telecom and telephony buses |
CompactPCI Multicomputing
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.14 | Rev 1.0 | 2000-09-16 | Defines requirements for multiple CPUs in a single system operating as a network |
Hot Swap Infrastructure Interface
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.12 | Hot Swap Infrastructure Interface |
Rev 1.0 | 2000-05-23 | Defines software support required for hot swappable systems |
CompactPCI Power Interface
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.11 | Rev 1.0 | 1999-10-01 | Defines optional power supply connections for higher power systems |
CompactPCI Mechanical Keying – Boards & Backplanes
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.10 | CompactPCI Mechanical Keying – Boards & Backplanes |
Rev 1.0 | 1999-10-01 | Defines mechanical keying of boards and backplanes according to IEC 61076-4 |
CompactPCI System Management
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.9 | CompactPCI System Management |
Rev 1.0 | 2000-02-02 | Defines a system management bus using I2C and IPMB |
6U CompactPCI Dual System Slot
| PICMG# | Name | Current Revision | Date | Description |
| PICMG2.7 | 6U CompactPCI Dual System Slot |
Rev 1.0 | 2001-03-23 | Expands CompactPCI to support two independent PCI buses from a single CPU |
CompactPCI Computer Telephony Specification
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.5 | CompactPCI Computer Telephony Specification |
Rev 1.0 | 1998-04-03 | Defines analog and digital computer telephony for J4/J5 and agency safety requirements |
IP Module on CompactPCI
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.4 | IP Module on CompactPCI |
Rev 1.0 | 1998-08-07 | Maps IP Module pins to J4/J5 connectors |
PMC Module on CompactPCI
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.3 | PMC Module on CompactPCI |
Rev 1.0 | 1998-08-07 | Maps PMC Module pins to J4/J5 connectors |
VME64x on CompactPCI® Specification
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.2 | VME64x on CompactPCI® Specification |
Rev 1.0 | 1998-08-07 | Maps Vme64x pins to J4/J5 connectors |
CompactPCI Hot Swap
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.1 | CompactPCI Hot Swap |
Rev 2.0 | 2001-01-17 | Defines additional requirements for building hot-swappable boards and systems |
CompactPCI Base Specification
| PICMG# | Name | Current Revision | Date | Description |
| PICMG 2.0 | CompactPCI Base Specification  |
Rev 3.0 | 1999-10-01 | CompactPCI® was developed in the mid 1990’s when PCI became the dominant chip-to-chip interconnect between microprocessors and I/O . It is electrically a superset of desktop PCI with a different physical form factor. CompactPCI utilizes the Eurocard form factor popularized by the VME bus. Defined for both 3U (100mm by 160 mm) and 6U (160mm by 233 mm) card sizes. CompactPCI has the following features:
Connector Definitions 3U CompactPCI processor boards use a single 220 pin connector for all power, ground, and all 32 and 64 bit PCI signals. This connector consists of two halves – the lower half (110 pins) is called J1 and the upper half (also 110 pins) is called J2. Twenty pins are reserved for future use. Backplanes use male (pin) connectors and plug-in boards use female (socket) connectors. Plug in boards that only perform 32 bit transfers can use a single 110 pin connector (J1). 32 bit boards and 64 bit boards can be intermixed and plugged into a single 64 bit backplane. 6U boards can have up to three additional connectors with a total of 315 pins. These are also 2mm style. These optional connectors can be used for a variety of purposes. They can be used as to bridge to other buses like VME or ISA in hybrid backplanes. These hybrid backplanes use CompactPCI for the processor and high speed peripheral section and one of these industrial buses for an I/O expansion section. PICMG has developed subsidiary specifications with defined pinouts for bridging to VME-64 and telephony buses like SCSA and HMVIP. These connectors, in conjunction with commercially available PCI-PCI bridge chips, can also be used to extend the CompactPCI bus in 8 slot increments. In this manner a CompactPCI system with 16, 24 or even 32 slots can easily be fabricated. The connectors can also be used for rear panel I/O. This approach, popular in the telecommunications industry, brings I/O wiring out the rear of the chassis. Eliminating front panel wiring can reduce the time required to replace a module in critical applications. The IEEE 1101.11 standard for rear panel I/O provides a standard method for doing this, and works well with CompactPCI. |
Target Applications
- General purpose embedded computing, including industrial control, communications, computer telephony, data acquisition, military & aerospace, avionics, surveillance, signage, multimedia, and instrumentation.
System Requirements
- CPU board, which may be a complete single board computer
- Backplane which distributes signals between boards
- Card cage for mechanical support of backplane and boards
- Power Supply. PICMG 2.11 defines one alternative, but power supply connections are generally left up to the system implementer
- I/O cards for application specific I/O
- Optionally, a chassis to mount everything in.
