CompactPCI® Serial RapidIO Specification


The objective of the CompactPCI Serial RapidIO Specification is to define backplane, node board, and switch board requirements that are compatible with both the Serial RapidIO Architecture Specification and appropriate existing PICMG® Specifications. This specification will provide designers, manufacturers, and integrators with a common set of requirements for implementing backplanes, boards, and chassis to deliver the benefits of Serial RapidIO interconnect, including high bandwidth (up to 20Gbps per slot in each direction), scalability, high availability features, PCI-compatibility and the ability to carry all required data on a single packet switched interconnect.

Ratified: June 18, 2004
SKU: PICMG 2.18 R1.0P Category: