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AMC531

The AMC531 is an AMC FPGA module based on the Altera Stratix IV EP4S100Gx device, compliant to the AMC.1, AMC.2, AMC.3 and/or AMC.4 specification. The unit has an on-board, re-configurable FPGA which interfaces directly to the AMC Ports 4-11, FCLKA, TCLKA, TCLKB, TCLKC, and TCLKD. The FPGA has an interface to DDR3 memory (64-bit wide) with 2GB capacity and an optional three banks of QDR-II+ (18-bit wide). This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host.

The AMC531 has dual 10GbE routed to the front and interfaces with dual SFP+ cages.

The on-board quad-core PPC runs at 1.2GHz with 2 GB of DDR3 and 128 MB of Boot Flash. The PPC has an x4 PCIe interface to the FPGA in addition to its local bus. The PPC has its dual GbE routed to ports 0 and 1 of the AMC which is Muxed with the FPGA.

AMC527

The AMC527 supports a single FMC per VITA-57, making it suitable for use with industry standard modules including VadaTech’s broad range of ADC, DAC, RF and network interfaceFMCs. The on-board Virtex-7 690T is suitable for local signal processing and data reduction prior to transfer out via the backplane using PCIe, SRIO or Ethernet.

The AMC ports 12-15 and 17-20 are optionally routed to the FPGA from the AMC connector, providing the user with flexibility to support custom high-bandwidth interconnects between compatible FPGA modules (depending on backplane capabilities). The FPGA is supported by FLASH memory for boot image storage, four banks of QDR-II+ for fast data buffering and a further bank of DDR3 for local data.

TCLKA-D are routed to the FPGA via an on-board clock and jitter cleaner while FCLK is routed directly. The module includes a very flexible clocking sub-system, supporting internal or external (backplane or FMC connector) clock source with internal PLL/jitter cleaner.

The AMC527 is available in both air-cooled (MTCA.0 and MTCA.1) and rugged conduction cooled(MTCA.2 or MTCA.3) versions.

AMC529

The AMC529 provides two Analog Devices AD9129. Each chip core is based on a quad switch architecture that enables dual-edge clocking operation, effectively increasing the DAC update rate to 5.7 GSPS when configured for Mix-Mode or 2x interpolation. The high dynamic range and bandwidth enable multi-carrier generation up to 4.2 GHz. The on-board Virtex-7 690T provides signal processing capability for complex waveform generation, appropriate for applications such as SDR, ATE and jamming.

The AMC ports 12-15 and 17-20 are optionally routed to the FPGA from the AMC connector, providing the user with flexibility to support custom high-bandwidth interconnects between compatible FPGA modules (depending on backplane capabilities). The FPGA is supported byFLASH memory for boot image storage, four banks of QDR-II+ for fast data buffering and a further bank of DDR3 for local data.

TCLKA-D are routed to the FPGA via an on-board clock and jitter cleaner while FCLK is routed directly. The module includes a very flexible clocking sub-system, supporting internal or external (backplane or FMC connector) clock source with internal PLL/jitter cleaner.

The AMC529 is available in both air-cooled (MTCA.0 and MTCA.1) and rugged conduction cooled(MTCA.2 or MTCA.3) versions.