PICMG

February 29, 2024

Members Only Series: Jens Hagemayer of Bielefeld University and the COM-HPC plus CXL Opportunity

COM-HPCOpen StandardsPICMGSlider

The Members Only interview series highlights leaders from within PICMG and throughout the open standards development community. We recognize their contributions and seek insight into their thought processes and strategies driving open technology-powered industries forward.

This issue we introduce Jens Hagemayer, a research associate at the Bielefeld University. Jens and his team have been intimately involved in the development of COM-HPC since its inception, championing the use of heterogeneous modules designed around FPGAs. Now they are investigating ways that Compute Express Link (CXL) specifications can take COM-HPC into new use cases.

PICMG: Can you describe your work outside of PICMG as well as the role you played in development of the COM-HPC specification? 

JENS: I am currently engaged in research at Bielefeld University, focusing on the development of heterogeneous and reconfigurable computing technologies for a wide range of applications. These include the Internet of Things (IoT), edge computing, cloud computing, and high-performance computing (HPC).

My involvement with the early stages of the COM-HPC specification centered on leading the development of the Platform Management Interface Specification and expanding the Embedded EEPROM Specification for COM-HPC. 

PICMG: You recently raised awareness about the CXL standard within the COM-HPC community. What is CXL and why is it relevant for PICMG COM-HPC developers and users?

JENS: CXL, or Compute Express Link, is a high-speed, high-capacity interconnect standard that facilitates efficient communication between CPUs, memory, and peripherals using the PCIe physical layer. Its support for cache coherency, disaggregation, and scalable architectures makes it a compelling choice for modular form factors like COM-HPC, driving its popularity among developers and users seeking advanced computing solutions.

PICMG: Why is CXL 3.1 significant in the context of COM-HPC? What use cases or capabilities will it drive in the COM-HPC ecosystem?

JENS: CXL introduces features that cater to the demanding requirements of cloud and high-performance computing systems. Its emphasis on scalable architectures, disaggregation, and cache coherency is particularly relevant for COM-HPC, offering the potential to revolutionize the way modular computing platforms are designed and utilized. 

The integration of CXL into COM-HPC could facilitate the development of more sophisticated computing solutions, enabling the seamless coupling of specialized accelerators and the establishment of cache-coherent multi-socket systems. These advancements promise to unlock new possibilities for COM-HPC applications, ranging from data-intensive analytics to AI and machine learning workloads, driving innovation in modular computing technologies.

PICMG: Given that CXL targets PCIe, has it been compatible with COM-HPC to date?

JENS: The relationship between CXL and COM-HPC is fundamentally influenced by CXL’s reliance on the PCIe physical layer for connectivity. This means that while direct compatibility between previous versions of CXL and COM-HPC has not been explicitly defined, the architectural underpinnings allow for potential integration. 

The absence of CXL in the current COM-HPC specification, coupled with the lack of support in existing modules, suggests that the integration of CXL represents a forward-looking opportunity for enhancing COM-HPC. Such integration is anticipated to require minimal modifications to the specification, paving the way for future advancements in modular computing.

PICMG: What does the COM-HPC community need to know about the CXL market or technical requirements to capitalize on the opportunity?

JENS: To fully leverage the potential that CXL brings to the COM-HPC community, it is crucial to understand the intricacies of CXL’s market dynamics and technical specifications. This involves a deep dive into the architecture of CXL, including its device types—such as Type 1 for I/O devices, Type 2 for cache-coherent devices, and Type 3 for memory expander devices. Additionally, understanding the topology options that CXL supports, including switch-based topologies for larger, more complex systems, can empower developers to design COM-HPC solutions that are both innovative and future-proof. 

Staying abreast of the evolving CXL specifications and market trends will enable the COM-HPC community to identify new opportunities for integration and application, ensuring that COM-HPC modules remain at the forefront of technological advancement.

PICMG: What are you and Bielefeld University doing with respect to CXL today?

JENS: We are working on integrating CXL within the RISC-V ecosystem, a venture that holds promising implications for the future of computing architectures. Our work focuses on the development of innovative bridge technologies that facilitate communication between the RISC-V Coherent Hub Interface (CHI) and CXL, using FPGA-based modules, which we refer to as microservers. 

This endeavor is not just about bridging two technical standards; it’s about creating a foundation for next-generation computing platforms that can seamlessly integrate diverse processing and memory resources. By developing these bridges, we aim to enable more efficient, scalable, and flexible computing architectures that can cater to the demanding requirements of modern applications, ranging from AI and machine learning to big data analytics.

PICMG: Where can interested parties go to find more information on CXL?

JENS: The CXL Consortium website serves as the primary repository of knowledge. This platform not only provides access to the official CXL specifications and technical documents, but also offers insights into the latest developments, industry adoption stories, and educational resources.

More Information:
• Compute Express Link: https://computeexpresslink.org
•*PICMG COM-HPC Overview: https://www.picmg.org/openstandards/com-hpc
•*PICMG Platform Management Interface Specification: https://www.picmg.org/product/com-hpc-platform-management-interface-specification

January 18, 2024

MicroTCA.0 Revision 3 Delivers 4x Performance Improvement with 100 Gigabit Ethernet, PCIe Gen 5 in up to 12 Slots

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Latest MicroTCA revision adds high-bandwidth interfaces and increased TDP to prepare the specification for demanding next-generation edge and server workloads

WAKEFIELD, MA. PICMG, a leading consortium for the development of open embedded computing specifications, has ratified Revision 3.0 of the MicroTCA.0 (µTCA.0) specification. This new release addresses urgent bandwidth requirements by defining 100 GbE and PCIe Gen 5 fabrics that improve system performance by 4x while also expanding platform thermal design power (TDP), enabling the use of higher performance processors. Users can now select from a range of specification-compliant building blocks and solutions that allow for more power per slot for higher transfer rates within µTCA chassis and to external systems and server clusters. It also lays the foundation for building next-generation MicroTCA proofs of concept.

Revision 3 of MTCA.0 addresses the current and future demands of applications such as machine vision, AI, defense, research, instrumentation, wireless communication, and emerging applications like quantum computing. “Revision 3 of MTCA.0 addresses urgent requirements and thus enables companies to now provide specification-compliant solutions rather than proprietary or custom approaches,” says Heiko Korte of NAT Europe and lead of PICMG’s MicroTCA Technical Working Group. “The fact that so many MicroTCA ecosystem suppliers have joined the working group shows the importance of the changes and also underlines the strong interest to make these part of an open specification.

“The broad spectrum of participants also ensured that every single agenda item got reviewed from different angles and properly discussed,” he adds.

MicroTCA.0 Revision 3.0-compliant solutions will be available shortly, including chassis, MicroTCA Carrier Hub (MCH), Advanced Mezzanine Card (AMC), Rear Transition Module (RTM), and power modules (PM) products from VadaTech, NAT, AIES Sp z o.o., nVent SCHROFF, and others. The commitment of existing vendors to continuing the development of µTCA products is joined by increased interest from players in emerging fields like quantum computing, projecting a healthy lifecycle for the open computing specification for years to come.

“VadaTech is proud to have been part of the development and ratification of revision 3 of the uTCA specification,” says Alex Malcom, Managing Director of VadaTech Ltd. “Its release secures the continued adoption of the standard by commercial, scientific and defense organizations around the world.”

The MicroTCA.0 Revision 3.0 specification can be accessed at www.picmg.org/product/micro-telecommunications-computing-architecture-base-specification. For more information on the MicroTCA family, visit https://www.picmg.org/openstandards/microtca.

About PICMG

Founded in 1994, PICMG is a not-for-profit 501(c) consortium of companies and organizations that collaboratively develop open standards for high performance industrial, Industrial IoT, military & aerospace, telecommunications, test & measurement, medical, and general-purpose embedded computing applications. There are over 130 member companies that specialize in a wide range of technical disciplines, including mechanical and thermal design, single board computer design, high-speed signaling design and analysis, networking expertise, backplane, and packaging design, power management, high availability software and comprehensive system management.

 

Key standards families developed by PICMG include COM-HPC, COM Express, CompactPCI, AdvancedTCA, MicroTCA, AdvancedMC, CompactPCI Serial, SHB Express, MicroSAM, and HPM (Hardware Platform Management). https://www.picmg.org.

September 13, 2023

Members Only Series: Meet Doug Sandy, PICMG’s CTO

Industry NewsNewsPICMG

The Members Only interview series highlights leaders from within PICMG and throughout the open standards development community. We recognize their contributions and seek insight into their thought processes and strategies that are driving open technology-powered industries forward.

This issue we introduce Doug Sandy, the CTO of PICMG. Over the past few months Doug has been busy handling the review and approval process of specifications such as MicroTCA.0 Revision 3, COM-HPC 1.1, COM-HPC 1.2, and ModBlox7.

PICMG: Who is Doug Sandy and what does he do?

DOUG: Who is Doug Sandy? What does he do? I am the Chief Technology Officer of PICMG. A little bit of background about me, I started in the embedded computing industry back in 1993 at a company called Pro-log.

Pro-log was based in Monterey, California, and we were one of the original founding members of PICMG. I don’t think I was in the very first meeting of PICMG, but I was there at the second meeting and my career sort of grew up with PICMG.

In 2017, I retired from my Chief Technology Officer position in industry to teach full time at Arizona State University, which is the largest university in the United States. I teach software engineering there and it also provides me a great opportunity to bring some of the things that are going on in PICMG and embedded computing into the classroom. It’s a nice merger of the two worlds of academia and industry.

I really enjoy working for PICMG. I enjoy the collaboration and the general atmosphere of the standards organization. We’re a no-nonsense organization. We get work done and we focus on working together. I’ve worked with other standards organizations or specification groups, and that’s not always the case. So, it’s just a joy to be in PICMG leadership.

PICMG: Speaking of work and getting work done, tons of different specifications are in the process of being ratified. What’s been on your desk recently?

DOUG: Oh, my goodness. Over the last year or two there have been more specifications going through PICMG than I can remember in all PICMG’s history. That’s a testament to PICMG’s relevance in the market.

One of the themes I’ve seen with the specifications going through is a return to PICMG roots – we started out as the PCI Industrial Computer Manufacturers Group. The specs we have in development right now have much more of a flavor of the traditional embedded markets. We’ve got things going into space, transportation, energy, robotic control, factory automation, and I’ve also heard rumblings of things going into telecommunications.

On a specification level, COM Express is a workhorse and it just keeps going. That’s the number-one module form factor out there by any measure you choose to look at it. There’s also been a huge interest in COM-HPC. PICMG is extending the computer-on-module concept from the laptop-caliber performance that you get with a COM Express module all the way up to high-end server performance with COM-HPC. One of the application spaces that’s been talked about is telecommunications for 5G applications, where you put computing at the edge or even merge the computing and the control node capabilities. But when you have a high-performance compute engine that’s on a module, you can do all sorts of other things with it.

In the high energy physics community, we have MicroTCA and AdvancedTCA. We have an initiative that’s aimed at oil and gas, which is exciting because it’s built for that space but can also find its way into other harsh environment automation spaces right near where the sensors and real-world interfaces are.

Another thing that’s in the works is ModBlox7, which is a modular computing concept that also takes us toward the sensors, toward the very edge of the computing network.

So there’s lots going on at PICMG. I can’t cover everything in this one interview. It’s really an exciting time. It’s fun to see how PICMG has evolved and shifted over the years.

PICMG: What do you think are the core values that keep engineers and organizations coming back to open standards like PICMG?

DOUG: It depends on where in the supply chain you sit. If you are an engineering manager, the value of open specifications is probably different than if you are an adopter of technology or an engineer that’s designing technology.

But if you’re a company that’s designing technology, one of the things open specifications and open standards do is provide a known interface you can design to. If you want to purchase, for instance, a module that plugs into your carrier card, you want to have an ecosystem of hardware out there that you can plug into your carrier and work. Without an open specification or open standard, what you have in the marketplace is just a variety of proprietary solutions; you can’t really focus on what you need to do without making it also tied to this other proprietary solution.

Open standards give you an opportunity to focus on what you’re good at. If you’re good at carrier boards, then you can focus on the carrier board and the logic and I/O on that and know there’s a compliant module that can plug in. This provides you freedom to focus on what you want, but also confidence in an ecosystem. If you’re on the other side of things and designing the modules, it provides a stable market as well because you know there are people creating carrier boards that need your module.

From those two perspectives, it’s helpful in building ecosystems. Other things open specifications are good for are problems that just can’t be solved by individual companies. I’ll give you an example of 100 Gigabit Ethernet (GbE).

100 GbE was something that we wanted to put on a backplane long ago. But if we had individual member companies working on how to solve that problem of 100 GbE the issue becomes we’ve got connector vendors designing connectors for what they think 100 GbE is, we’ve got backplane designers or cable designers designing for what they think it is, and we have board manufacturers designing to what they think. What you have is a bunch of chaos and the burden of integrating a system without an open specification or standard that governs all that falls on the integrator. The integrator needs to qualify every single piece of their solution and it can become very, very difficult.

What open specifications and open standards organizations do is provide a safe harbor for competitors to collaborate with one another to solve these industry problems. PICMG has been successfully doing that since its inception. I can’t say enough good things about the PICMG member companies, their professionalism, and their technical competency in solving some of the hardest technology problems in the industry. And I know that we’re going to continue that in the future.

PICMG: What are some of the things that you’re available to the community for?

DOUG: My primary responsibility as Chief Technology Officer of PICMG is to manage and respond to requests about the organization’s policies and procedures. That includes facilitating the entire specification standardization process, from statement of work through ratification.

I’m always interested in new concepts for specifications and assisting with making them a reality. If you have an idea for a specification that you want to see turned into reality, please reach out to me and I will try to help you along that process. That is part of my role as well.

Some of the other things that I’m really interested in on a technology level is in the space of Industrial IoT. How can we promote cyber-physical systems and digital twinning? PICMG does have some work going on in that area, laying the foundation in our IoT work. So, if you want to talk to me about that, that’s an exciting topic. I’d even be open to facilitating some research in that area with student workers. I think that’s going to be an exciting technology as it comes to reality in the future.

PICMG: How can the membership get in touch with you?

DOUG:

Do**@PI***.org











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