CompactPCI® PlusIO Specification
$750.00
This specification defines the I/O assignment of the J2/P2 32-bit CompactPCI® System Slot connector in order to extend the parallel PCI bus with high-speed serial busses. CompactPCI® PlusIO defines the support of PCI, PCI Express, Ethernet, SATA/SAS and USB concurrently. In addition to the parallel PCI bus architecture this I/O specification allows the use of the CompactPCI® system slot to provide a simple star architecture based on the specified serial bus standards.
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| Image | Name | Summary | Price | Buy |
|---|---|---|---|---|
| CompactPCI® Core Specification, with PICMG ECN 002 on Self-Describing Slot Geography | CompactPCI is an adaptation of the Peripheral Component Interconnect (PCI) Specification 2.1 or later for industrial and/or embedded applications requiring a more robust mechanical form factor than desktop PCI. CompactPCI uses industry standard mechanical components and high performance connector technologies to provide an optimized system intended for rugged applications. CompactPCI provides a system that is electrically compatible with the PCI Specification, allowing low cost PCI components to be utilized in a mechanical form factor suited for rugged environments. | $750.00 | ||
| CompactPCI® Hot Swap Specification | The primary objective of this specification is to extend CompactPCI® to Hot Swap applications. Hot Swap defines a process for installing and removing boards without adversely effecting a running system. CompactPCI® Hot Swap allows board vendors and platform vendors to add functionality and cost incrementally to a system. | $750.00 | ||
| Keying of CompactPCI® Boards and Backplanes Specification | To safely support overlapping uses of CompactPCI’s user-definable pins, use of the keying mechanisms defined in IEC 61076-4-101 for the J4/P4 connector and in IEEE 1101.10 for handle and cardguide hardware will be required. In the interest of providing a single reference document and to reduce the risk of duplicated use, assignment of these keys will be centrally administered by the PICMG Technical/Executive Committee. | $750.00 | ||
| CompactPCI® Power Interface Specification | PICMG 2.11 defines the electrical and mechanical interfaces, and minimum requirements for modular CompactPCI® pluggable power supplies and related CompactPCI® platforms based on the CompactPCI® core specification PICMG 2.0 R2.1. Although the CompactPCI® core specification PICMG 2.0 R2.1 defines an optional pluggable power supply connector interface; this interface is inadequate to support many higher power applications. This specification, PICMG 2.1, provides a defined interface to support higher power supply output current levels and 6U form factor power supplies, as well as providing some additional functionality to support Hot Swap applications, and a growth path for high availability systems | $750.00 | ||
| Hot Swap Infrastructure Interface Specification | CompactPCI® Hot Swap defines a process for installing and removing CompactPCI® | $750.00 | ||
| CompactPCI® Multicomputing Specification | The CompactPCI® MultiComputing Network (MCNet) allows multiple Peripheral Nodes (PN) CPU boards and one System Node (SN) CPU board to perform inter-processor communications (IPC) over a CompactPCI backplane (or other shared PCI address space) as if they were discrete computers on a network. | $750.00 | ||
| PCI Telecom Mezzanine/Carrier Card Specification | The PCI Telecom Mezzanine Card (PTMC) is based on the four connector standard PCI Mezzanine Card (PMC). The PTMC provides all of the traditional PMC 32-bit PCI signals on the Pn1 and Pn2 connectors and specifies the use of industry standard telecom interfaces on Pn3 and Pn4. In addition, interoperability with 64-bit PCI is provided as a dedicated configuration type. PTMC leverages the success, form factor, and functionality of the PMC series of peripheral mezzanine cards, but is not a replacement for PMC. It will coexist with PMC and support four popular industry standard telecom bus interfaces. PTMC brings new definition and flexibility to the world of slim modular mezzanine cards for PCI, CompactPCI, and VME. | $750.00 | ||
| CompactPCI® Packet Switching Backplane Specification | The CompactPCI® Packet Switching Backplane (CompactPCI/PSB) is an extension to the PICMG 2.x family of specifications that overlays a packet-based switching architecture on top of CompactPCI to create an Embedded System Area Network (ESAN). It supplements the robust, reliable and hot-swap capable CompactPCI architecture with the easily integrated, low-cost, high-performance, and extensible Ethernet. | $750.00 | ||
| CompactPCI® StarFabric Specification | The objective of the CompactPCI® StarFabric Specification is to define backplane, node board, and switch board requirements that are compatible with both the StarFabric Architecture Specification and appropriate existing PICMG Specifications. This specification will provide designers, manufacturers, and integrators with a common set of requirements for implementing backplanes, boards, PMC modules, chassis and multi-chassis combinations to deliver the benefits of StarFabric interconnect, including high bandwidth (>5Gbps per slot), scalability up to 1000’s of nodes, high-availability features, PCI-compatibility and the ability to carry control, TDM, cell and packet data on a single interconnect. | $750.00 | ||
| CompactPCI® Serial RapidIO Specification | The objective of the CompactPCI Serial RapidIO Specification is to define backplane, node board, and switch board requirements that are compatible with both the Serial RapidIO Architecture Specification and appropriate existing PICMG® Specifications. This specification will provide designers, manufacturers, and integrators with a common set of requirements for implementing backplanes, boards, and chassis to deliver the benefits of Serial RapidIO interconnect, including high bandwidth (up to 20Gbps per slot in each direction), scalability, high availability features, PCI-compatibility and the ability to carry all required data on a single packet switched interconnect. | $750.00 | ||
| VME64x on CompactPCI® Specification, PMC on CompactPCI® Specification, IP on CompactPCI® Specification | This specification maps VME64x bus signals onto the J4/P4 & J5/P5 2 mm connectors of a 6U CompactPCI® board. Using this connector pin assignment you can build a board with a VME64x and a CompactPCI® bus interface that will fit into a single 6U Eurocard backplane slot. The VME64x interface is on the top connectors, J4/P4 & J5/P5, and the CompactPCI® interface is on the bottom connectors, J1/P1 & J2/P2. The middle connector, J3/P3, can be used for user defined I/O.” | $750.00 | ||
| CompactPCI® Serial Mesh Backplane Specification | This specification defines a high-speed serial fabric for CompactPCI® platforms. The purpose of this fabric is to enhance the data transport capability of CompactPCI® platforms for high-end applications like telecom multi-service routers and gateways while maintaining compatibility with existing CompactPCI® standards to protect investment. | $750.00 | ||
| CompactPCI® Computer Telephony Specification | The goal of this specification is to extend the capabilities and utility of the CompactPCI® 6U based system architecture to support the application needs of the Computer Telephony (CT) industry, by providing CompactPCI system vendors and CT board vendors with specifications that will promote multi-vendor interoperability and support the design of open, standards based components and systems. These goals include provisions for intrasystem isochronous (TDM) media transport, common telephony I/O definition, reliable hot swap of CT Front Boards and peripherals, as well as agency-aware safety recommendations. | $750.00 | ||
| 6U CompactPCI® Dual System Slot Specification | The Dual System Slot (DSS) Specification defines the interface requirements between a CompactPCI® System Board and backplane for two independent CompactPCI® buses to be driven from the System Board. In DSS systems, CompactPCI® buses are provided at J1/J2 and J4/J5. The bottom bus connected to J1/J2 is referred to as CompactPCI® Bus A; the top bus connected to J4/J5 is referred to as CompactPCI® Bus B. The relationship between CompactPCI® Bus A and CompactPCI® Bus B is not specified. This specification allows backplane designers and CPU manufacturers to refer to a common specification from which to build systems. | $750.00 | ||
| CompactPCI® System Management Specification | This document defines an implementation of a system management bus in a CompactPCI® system. The bus uses an I2C hardware layer, and is based on the Intelligent Platform Management Interface (IPMI) and Intelligent Platform Management Bus (IPMB) specifications. The remainder of this chapter is devoted to a survey of the architecture, theory, and issues behind system management with guidance on how best to use this specification. The following chapters are organized to present first hardware then software specifications, requirements, and options. | $750.00 | ||
| CompactPCI® Express Specification | This specification’s objective is to bring PCI Express technology to the popular PICMG 2.0 CompactPCI® form factor. This specification is intended to meet the future market needs of the CompactPCI®, PXI, military, and aerospace markets and defines the connector, electrical, and mechanical requirements of 3U/6U System Boards, Peripheral Boards, Switch Boards, and Backplanes. | $750.00 |















