Features:
– Conforms to PICMG 2.0 R 3.0, PICMG 2.1 R 1.0, PICMG 2.5 R 1.0
– System slot right
– Front of the backplane supports IEEE 1101.10-compliant boards
– Rear of the backplane supports IEEE 1101.11-compliant transition cards
– RSR backplanes have the capability to support various external devises such as supplemental cooling fans and I/O hardware
– RSR backplane series was developed for systems using a cPCI-CPU which does not support the CT bus on the J4 connector
– Pins of rows A to E of the P4 connector in the system slot are not connected to the backplane and available to the CPU board for rear I/O applications
– In keeping with the cPCI specification, rows Z and F of the system slot P4 connector are connected to the logical GND layer.
Specifications:
– Variant RSR:
– P4 on system slot has rear panel I/O assignments
– 3.3V (I/O), 33 MHz, 3 to 8 slots
– 3.3 V(I/O), 66 MHz, 3 to 8 slots
– 5 V(I/O), 33 MHz, 3 to 8 slots
– Variant RSN:
– P4 on system slot is not assembled
– 3.3V (I/O), 33 MHz, 3 to 8 slots
– 3.3 V(I/O), 66 MHz, 3 to 8 slots
– 5 V(I/O), 33 MHz, 3 to 8 slots
