The AMC532 is an FPGA based on the Altera Stratix-V 5SGXEA. The module is compliant to the AMC.1, AMC.2, AMC.3 and/or AMC.4 specification. It has an on-board, reconfigurable FPGA which interfaces directly to the AMC backplane and FMC connectors.
The FPGA has interfaces to four banks of DDR3 memory (32-bit wide per bank). This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host.
The AMC532 includes a sophisticated Quad PLL and M-LVDS/LVDS crossbar switch for low-jitter/low-latency clock handling with maximum flexibility between the backplane, FMC, and FPGA. The PLL has an option for Stratum-3 holdover.
The AMC532 has Serial over LAN (SOL) per the IPMI specification and a hardware RNG (Random Number Generator) for secure session to redirect the console serial port of an FPGA-based soft-core CPU.
