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The AMC004 provides a complete GPS bus-level timing solution to a μTCA/ATCA system. The on-board GPS receiver is used to discipline the local oscillator and cancel out any oscillator drift or aging. Precision UTC timestamps and GPS location/time/status are all made available via PCIe/SRIO registers to the host CPU/application. Time trigger output and time event interrupts synchronized to GPS UTC are available under host control. GPS location/time/status data Broadcast/Unicast output via backplane Ethernet with selectable bonding/failover behavior. The disciplined clock, 1PPS, divided-down clock, and time trigger may be output in any combination to the TCLKA / TCLKB / TCLKC / TCLKD backplane channels. PPS IN synchronization pulse usually comes from the on-board GPS but can alternatively come from the front/back inputs if the GPS signal is not available.

A backup battery or SuperCap provides non-volatile storage of the Almanac, Ephemeris, and Last position data to enable rapid “warm start” re-acquisition usually within 35 seconds. The module has a serial port in the front that enables advanced configuration and monitoring support. Locking/holdover status is also available via IPMI sensors. A secondary serial port enables NMEA data in/out.

The AMC005 provides a complete, feature-rich, GPS / PTP (1588) / IRIG / NTP bus-level timing solution to a μTCA/ATCA system, with exceptional flexibility.

The on-board GPS receiver or 1PPS or IRIG input is used to discipline the local oscillator and cancel out any oscillator drift or aging. Precision UTC timestamps and GPS location/time/status are all made available via PCIe registers to the host CPU/application. Time trigger output and time event interrupts synchronized to GPS UTC are available under host control. GPS location/time/status data Broadcast/Unicast output via backplane Ethernet with selectable bonding/failover behaviour.

The board can demodulate IRIG Amplitude Modulated (AM) signals and receive/transmit IRIG DC Level Shift (DCLS) signals. The disciplined clock, 1PPS, divided-down clocks, IRIG DCLS, and time trigger may be output in any combination to the TCLKA / TCLKB / TCLKC / TCLKD backplane channels.

The board acts as a Grand-Master Clock/Clock Bridge between GPS / PTP (1588) / IRIG / NTP to provide enhanced flexibility to your system design. The board also supports Synchronous Ethernet (SyncE) to eliminate clock drift at the Ethernet PHY level.

A backup battery or SuperCap provides non-volatile storage of the Almanac, Ephemeris, and Last position data to enable rapid “warm start” re-acquisition, usually within 35 seconds. The module’s console is available via front serial or SSH via Ethernet. Locking/holdover status is also available via IPMI sensors. A secondary serial port enables GPS NMEA data in/out.

VIM556 3U CompactPCI Graphics Controller Module is designed for using as part of the 3U CompactPCI Serial embedded computing systems and is intended for output of graphic information to the display via DisplayPort interface. VIM56 contains NVIDIA Quadro K2100M graphics card of MXM 3.0 standard with support of CUDA parallel computing architecture. Using VIM556 module, computing system is able to carry out high-performance multi-threaded computations and output high-resolution graphic information to several displays (up to 4) simultaneously using DisplayPort interface. There are several VIM556 versions, both equipped with the graphics card, and implemented with conduction cooling.

NVIDIA Quadro K2100M: Graphics Controller Module: 665 MHz, 576 CUDA cores
RAM: 2 GB GDDR5, 128 bit, 48 GB/s
Graphics: 2X3840X2160 @ 60 Hz
DisplayPort: 4x DisplayPort interfaces on the front panel
Power supply: Supply voltage: +12 V ± 10%
OS compatibility: Windows 7 Professional 32/64 bit, Windows Embedded
Standard 7 32/64 bit; Linux Debian 7.0 32 bit, Astra Linux 64 bit
Operating temperature range:
Commercial version: from 0 to +70° С;
Industrial version: from -20 to +70° С
Version with conduction cooling: from -20 to +55°С
MTBF: No less than 250 000 hours