Archives

The AMC523 is a dual DAC (Digital to Analog Converter) module compliant to the MicroTCA.4 specification. The unit has an on-board, re-configurable FPGA which interfaces directly to the GbE and PCIe bus. It also has 12 channels ADC digital LVDS routed to the FPGA from the MRT523 RTM.

The FPGA has an interface to the DDR3 memory. This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host.

The AMC523 allows for flexible external clocking as well as internal clocking. The module has a Trig In/Out signal that is sourced from the front panel or port 17. Each input/output goes to the Rear Transition Module (RTM) connector that complies with μTCA.4. Each of the ADC/DAC single ended inputs are converted to differential signals.

The FPGA interfaces to the front panel via quad SFP+, I/O headers, JTAG, CLK In/Trig In/Out, and LEDs. An RS-232 port is also available from the FPGA if the customer desires to implement a soft-processor in the FPGA and utilize a serial console.

The AMC522 is dual channel MAX5878 DAC module compliant to MicroTCA.4. The sampling rate is 500 MSPS at a 16-bit resolution. Compliant to the AMC.1, AMC.2, and AMC.4 specifications the unit has an on-board, re-configurable Kintex-7 FPGA which interface directly to ports 4-11. Port 17 is also routed directly to the FPGA for Trigger I/O. The

AMC522 has several front panel ports including JTAG, quad SFP+, and SMB for Clock input and Trigger I/O. There is also an RS-232 port via microUSB for management. The output from the dual

The AMC521 utilizes eight dual channel ADS42JB69 ADC converters at 250 MSPS with 16-bit resolution for 16 high sampling rate channels. In addition the module has eight 16-bit Successive Approximation Register (SAR) based on TI ADS8568 ADC at a lower sampling rate for measurements to 650 KSPS. There are also 24 LVDS I/O which can be used for Clock In/Out, Trig In/Out or GPIO.

The AMC521 has an M-LVDS Cross Bar Switch (CBS) for clock distribution which allows clocking from front panel, backplane, or on-board VCXO. The clock outputs to the backplane for distribution to other modules. The AMC521 has a Virtex-7 FPGA with option of 415T or 690T in FFG1158 package.

The AMC ports 4-7 and 8-11 are routed to the FPGA for PCIe, XAUI, SRIO, or other SerDes protocols. AMC ports 0, 1 and 2, 3 are also routed to the FPGA for base channel and storage point-to-point connectivity.