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AMC596

The AMC596 is based on the Virtex UltraScale XCVU440 FPGA in FLGA2892 package withan on board Power PC P2040. The AMC596 is compliant to the AMC.1, AMC.2, AMC.3 and/orAMC.4 specification.

The module provides 20 SERDES lanes on tongue 2, providing high-bandwidth connectivity toanother module at a very high speed (where supported by appropriate chassis). The use of thetongue 2 connector complies with the AMC.0 specification.

The on-board, re-configurable FPGA interfaces to the AMC FCLKA and TCLKA-D via a MLVDSCross Bar Switch (CBS). The FPGA has interface to one DDR4, 64-bit wide, with 8 GB totalmemory. This allows for large buffer sizes to be stored during processing as well as for queuingthe data to the host.

The on-board quad core P2040 runs at 1.2 GHz with 1 GB of DDR3, 128 MB of Boot Flash, anda 32 GB SD Card. The PPC has x4 PCIe interface to the FPGA in addition to its local bus. ThePPC has its dual GbE routed to ports 0 and 1 of the AMC via a mux to allow FPGA routing tothe ports as well. The same applies to ports 2-3 (PPC SATA ports or directly to the FPGA viamux selection).

AMC595

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The AMC595 is based on the Virtex UltraScale XCVU440 FPGA in FLGA2892 package with an on board Power PC PC2040. The AMC595 is compliant to the AMC.1, AMC.2, AMC.3 and/or AMC.4 specification.

The module allows an FMC module to be mated. However, the FMC module must not use the standard height connector and must have the mated height of 17.5 mm (SamTec partnumber SEAM-40-11.0-L (or S)-10-2-A on the FMC module, the standard FMC connector is SEAM-40-03.5-L (or S)-10-2-A). VadaTech will deliver any of its FMC modules that mate to the AMC595 with the modified connector height. Contact Sales for the ordering option.

The on-board, re-configurable FPGA which interfaces directly to the AMC FCLKA and TCLK A-D via a Cross Bar MLVDS (CBS). The FPGA has interface to one DDR4, 64-bit wide,with 8 GB total memory. This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host.

The on-board quad core P2040 runs at 1.2 GHz with 1 GB of DDR3, 128 MB of Boot Flash,and a 32 GB SD Card. The PPC has x4 PCIe interface to the FPGA in addition to its local bus. The PPC has its dual GbE routed to ports 0 and 1 of the AMC via a mux to allow FPGA routing to the ports as well. Same applies to ports 2-3 (PPC SATA ports or directly to the FPGA via mux selection).

AMC532

The AMC532 is an FPGA based on the Altera Stratix-V 5SGXEA. The module is compliant to the AMC.1, AMC.2, AMC.3 and/or AMC.4 specification. It has an on-board, reconfigurable FPGA which interfaces directly to the AMC backplane and FMC connectors.

The FPGA has interfaces to four banks of DDR3 memory (32-bit wide per bank). This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host.

The AMC532 includes a sophisticated Quad PLL and M-LVDS/LVDS crossbar switch for low-jitter/low-latency clock handling with maximum flexibility between the backplane, FMC, and FPGA. The PLL has an option for Stratum-3 holdover.

The AMC532 has Serial over LAN (SOL) per the IPMI specification and a hardware RNG (Random Number Generator) for secure session to redirect the console serial port of an FPGA-based soft-core CPU.