The PICMG 3.4 specification is a member of the PICMG 3.0 AdvancedTCA series of specifications. The PICMG 3.0 base specification defines a Board and Shelf architecture sharing a common Backplane. PICMG 3.4 Boards are intended for use with PICMG 3.0 backplanes, sub-racks and shelves. The specification is sufficiently generic that it can accommodate many different point-to-point differential pair serial link standards. PICMG 3.4 defines the use of both PCI Express Base and Advanced Switching based on PCI Express within an AdvancedTCA platform.
The PCI Express Base specification was ratified by the PCI Special Interest Group in July 2002.
The Advanced Switching specification, which defines functional extensions to the PCI Express Base PHY and link layers, is currently under development. Because PCI Express and Advanced Switching are electrically compatible, PICMG 3.4 requirements apply to both technologies. The Advanced Switching Specification is targeted at enabling additional communications capabilities, including a globally flat addressable fabric used to enable star and mesh topologies, message passing, multicast and broadcast capabilities, as well as congestion management and transport reliability.
The content of this document is derived from and is dependent upon the PICMG 3.0 base specification. It is not intended as a standalone document or to be used separately from the base specification.
PICMG 3.4 builds upon the PICMG 3.0 specification to meet the following objectives:
• Define the PCI Express signals to be used over the Fabric Interface defined in the PICMG 3.0 base specification.
• Provide guidelines for the use of x1, x2, and x4 PCI Express links through Link Width Negotiation.
• Support over each PICMG 3.0 Channel for up to 10Gbps PCI Express links.
• Establish the System Management criteria for ensuring compatibility between PICMG 3.4 boards.
• Define design rules such that devices compatible with other PICMG 3.0 standards can be safely inserted in the same system, even if they do not interoperate.
• Provide example topologies and example implementations for Board and Backplane developers.