System Host Board PCI Express
The SHB Express™ SHB is designed to interface with PCI Express peripherals on a backplane. The PCI Express interconnects with the backplane can operate at x1, x4, x8, x16, and others depending on the capabilities of both the SHB and the backplane.
The optional PCI(-X) portion of the SHB interconnect with the backplane allows for 32- bit operation. The clock rate between the SHB and the backplane can be 33MHz, 66MHz, 100MHz, and 133MHz, depending on how the backplane and SHB are designed. There is also a pin used to enable PCI-X operation if both the SHB and the backplane are capable of operating in this mode.